Paul Borrill

Paul Borrill is founder and CEO of DÆDÆLUS and is a leading industry expert on the foundations of resilient network and storage infrastructures.

He has served as CEO of Earth Computing on Apple’s Infrastructure team, as CEO of Replicus Research, VP/CTO for VERITAS Software; VP/Chief Architect for Storage Systems at Quantum Corporation; Distinguished Engineer, Director of Architecture & Performance and Chief Scientist for IR at Sun Microsystems. 
Paul has a BSc. In Physics from the University of Manchester, a Ph.D in Physics from University College London, and is a graduate of the Stanford Executive Program.

Paul was on the Founding Team of the Hot Interconnects Symposium; Founding Chairman of the SNIA (Storage Networking Industry Association; He served as Vice President of Technical Activities, Vice President of Standards, and on the Governing Board of the IEEE Computer Society and IEEE Computer Society, VP of Standards Activities.

Paul’s lifelong interest in dependable computing came from working with NASA, designing computer systems & software for an experiment which performed extraordinarily well on flight 51F of the Space Shuttle.

Chuck Sobey
Advisor | Business Development

Chuck Sobey is an expert on emerging data-centric technologies. His decades of experience in signal processing, probability analysis (of black swan events and tail latencies), and error correction coding (ECC) are applied to semiconductor memory, storage, archiving, and networking technologies. He concurrently leads the technology consulting firm, ChannelScience, where he secured $1.6M in funding
from the US Department of Energy to prototype magnetic sensing and signal processing innovations for unlocking the value of legacy datasets for machine learning.

At DÆDÆLUS, Chuck is  responsible for customer discovery and development. He will translate the great ideas and industry-changing breakthroughs that our team at Daedaelus makes into benefits that customers know they need. Chuck’s background is in memory and data storage, specifically signal processing, coding, and error mitigation architectures for emerging technologies. he also creates and produces technology conferences and tradeshows.

Thousands of professionals have learned the latest storage technologies in KnowledgeTek classes that
Chuck wrote and presented around the world. Students value his ability to make complex concepts clear
and useful to broad audiences. Chuck scaled his in-person education and community-building efforts by
starting and leading technology conferences/tradeshows in data storage, memory, and networking. He
spearheads innovative, targeted diversity, equity, and inclusivity (DEI) efforts for these events, which
include Flash Memory Summit, SmartNICs Summit, and Chiplet Summit.
Chuck is an award-winning senior member of the IEEE, with patents, papers, lectures, and keynotes to his credit. Chuck has an MS in adaptive statistical signal processing from the University of California at Santa Barbara and a BS ECE from Carnegie Mellon University.

Charlie Johnson
Advisor | Engineering

Charlie Johnson is an expert in distributed systems, formerly head of the Transaction Group at Tandem NonStop, where he wrote the three-phase commit transaction protocol, through which $1 Trillion+ a day is transacted through his code. Charlie’s a specialist in C++ HLS on Intel Stratix 10 FPGA, for cut-through ultra low latency packet processing, and real time views of that data on /dev/shm on the XEON and from in memory databases. He’s worked on HLS and software for the Xilinx U50 and Kria KR260, hardware and software for IoT applications in real-time structure accelerometer analysis and also in 5G city pole monitoring and managing a programmable logic controller (PLC).

Charlie has spent decades in transaction processing at Tandem/Compaq/HPE Nonstop, working with distinguished colleagues including Shel Finkelstein, Pat Helland, Jim Gray, Franco Putzolu, while writing much of the code that big fintech depends on, crash consistency, fault tolerance, distributed transaction three-phase commit, etc.

He’s also worked at HP/HPE Labs working on various projects for the NSA and Fintech, NASA the U.S. Navy, and the Israeli Air Force.

Jonathan Gorard
Advisor | Mathematician

Jonathan Gorard is an applied mathematician who has worked extensively on applying methods from theoretical computer science (including graph theory, category theory, topos theory and homotopy type theory) to the foundations of physics (especially discrete models of spacetime, computable foundations for quantum mechanics and quantum field theory, quantum gravity, etc.) He specializes in the conversion of abstract mathematical formalism into concrete computational implementation. He has previously led advanced algorithms R&D projects in quantum computing, automated theorem-proving, computational category theory, numerical relativity, computational astrophysics, graph rewriting, non-deterministic computation and many other areas, both in his capacity as a research fellow at Wolfram Research (where he co-founded the Wolfram Physics Project, and remains its associate director); an advisor on quantum computing to IBM, Arup and other companies; and as an academic researcher. 

He was previously a master’s student, PhD student and later researcher at the University of Cambridge, and is currently director of the Centre for Applied Compositionality at Cardiff University. His published research spans many fields, including quantum gravity, quantum information theory, combinatorics, mathematical logic, category theory, computational complexity and the philosophy of science.
At DÆDÆLUS, Jonathan’s responsibilities include producing formal specifications of DÆDÆLUS’s underlying distributed protocols and algorithms; synthesizing formal proofs (using state-of-the-art automated theorem-proving techniques) of algorithm correctness, freedom-from-deadlock and other properties; developing an end-to-end toolchain that allows for seamless translation between a high-level, formally-verifiable and compositional description of a protocol in Rust/Mathematica, and its low-level FPGA implementation description in Verilog/RTL; and researching potential applications of novel causality formalisms (e.g. from quantum information theory, higher category theory, theory of Petri nets, etc.) to DÆDÆLUS’s distributed protocols.

Dugan Hammock

Dugan Hammock received a Bachelors degree from the University of Texas at Austin and a Masters degree from the University of Massachusetts at Amherst, both in pure Mathematics. Independently he has done extensive work utilizing computer rendering software to produce geometric visualizations and animations; this work has brought him to such places as T<u>bingen, Germany and the Netherlands.

His most recent work involves the development of computational methods to visualize and better understand 4-dimensional geometries and other hyper-dimensional structures.

Sahas Munamala

Sahas is a new graduate from the University of Illinois Urbana Champaign majored in Computer Engineering. He has a strong background in software development and engineering from years of projects and teams. With a passion for innovation and problem-solving, he has made significant contributions to various open source projects and organizations.


Sahas has interned at Amazon, enhancing an interface for Alexa Shopping and adding new features to the AWS Serverless backend. He also started a Math/CS online tutoring service, reaching 60 students and professionals, and led online courses in Python and HTML/CSS/JS. He also has interests in embedded systems, Robotics, IoT, computer and network security, and computer vision. In his final year, he ported an AI accelerator to run 20 times faster on an FPGA compared to a numpy implementation. At DÆDÆLUS, he will build his experience with Altera and Xilinx FPGAs to help develop the next generation of network protocols.

Steve Chalmers
Interconnect Wizzard

Steve spent decades at Hewlett Packard doing R&D, managing R&D engineers, and as staff to CTOs in servers, then storage, and finally networking. This included CPU design, memory system design, I/O system design and architecture, remote support architecture and implementation, traditional and scale out disk array architecture, storage networking, storage performance, storage QoS, storage security, network TOR and chassis switch design based on merchant silicon; separation of control and data planes; optimization of combined server/storage/network products.

Steve’s focus for the past decade has been breaking out of the “best practice” data center server/storage/network we as an industry chose 20 years ago. Dissolving silo walls between server, storage, and network, and more importantly between the application and all three of those silos, creates opportunities for factor-of-n improvements in latency, robustness, and price/performance of server-resident distributed applications.